Data Transfer Instructions:
1) MOV r1,r2 (Move data;move the contents of one register to another ).
The contents of r2 register is moved to r1.This instruction doesn't affect any flags.
States: 4 Machine cycles :1.
2)MOV r,M (move the content of memory to register).
No Flags are affected after executing this instruction.Addressing modes is register indirect.
States: 7 Machine cycles :2.
3)MOV M,r (move the content of register to memory).
No Flags are affected after executing this instruction.Addressing modes is register indirect.
States: 7 Machine cycles :2.
4)MVI r,data(move immediate data to register).
No Flags are affected after executing this instruction.Addressing modes is immediate.
States: 7 Machine cycles :2.
5)MVI M,data(move immediate data to memory location).
No Flags are affected after executing this instruction.Addressing modes is immediate/register indirect.
States: 10 Machine cycles :3.
6)LXI rp,data16(Load register pair immediate).
This instruction loads immediate data of 16-bit into register pair rp.No Flags are affected after executing this instruction.Addressing modes is immediate.
States: 10 Machine cycles :3.
7)LDA addr(Load accumulator direct).
The content of the memory location specified in the instruction is stored into the accumulator.
No Flags are affected after executing this instruction.Addressing modes is direct.
States: 13 Machine cycles :4.
8)STA addr(Store accumulator direct).
The content of the memory location specified in the instruction is stored with the accumulator contents.No Flags are affected after executing this instruction.Addressing modes is direct.
States: 13 Machine cycles :4.
9)LHLD addr(Load H-L pair direct).
The content of memory location specified in the instruction is stored in the L register and the next memory location content is stored in the H register. No Flags are affected after executing this instruction.Addressing modes is direct.
States: 16 Machine cycles :5.
10)SHLD addr(Store H-L pair direct).
The content of memory location specified in the instruction is stored with the L register contents and the next memory location content is stored with the H register contents. No Flags are affected after executing this instruction.Addressing modes is direct.
States: 16 Machine cycles :5.
11)LDAX rp(LOAD accumulator direct).
The content of memory location,whose address is stored in the register pair is loaded into the accumulator.No Flags are affected after executing this instruction.Addressing modes is register indirect.
States: 7 Machine cycles :2.
12)STAX rp(LOAD accumulator direct).
The content of the accumulator is stored in the memory location,whose address is stored in the register pair.No Flags are affected after executing this instruction.Addressing modes is register indirect.
States: 7 Machine cycles :2.
13)XCHG(Exchange the contents of H-L with D-E pair).
The contents of H-L pair are exchanged with contents of D-E pair.No Flags are affected after executing this instruction.Addressing modes is register direct.
States: 4 Machine cycles :1.
These are the different data transfer instructions that are present in the 8085 microprocessor.
Saturday, September 26, 2009
Instruction set of 8085-1(Intro)
An instruction is a command given to computer to perform the specified operation on given data.
The instruction set of a microprocessor is the collection of the instructions that the microprocessor is designed to execute.The instructions that are said in this set are based on the Intel 8085 processor.The programmer can write a assembly language program using the instruction set of a microprocessor.These instructions are classified into the following groups:
1) Data Transfer Instructions.
2) Arithmetic Instructions.
3)Logical Instructions
4)Branch Control Instructions
5)I/O and Machine Control Instructions.
Data Transfer Instructions:
->Instructions which ate used to transfer data from one register to another register from memory to register or register to memory will come under this group.The different data transfer instructions are MVI,LXI,LDA,STA etc. For more detail Click here.
Arithmetic Instructions:
->The instructions of this group perform operations like addition,subraction,increment or decrement of the content of the register or the memory location.Examples :ADD,SUB,INR,DAD.
Logical Instructions:
->The instructions of these group perform logical operations like AND,OR,compare,rotate etc.
Examples are ANA,XRA,ORA,CMP,RAL etc.
Branch Control Instructions:
->This group includes the instructions for conditional and unconditional jump,subroutine call,return and restart.Examples are: JMP,JC,JZ,CALL,CZ,RST etc.
I/O and Machine Control Instructions:
->This group includes the instructions for input/output ports,stack and machine control.
Examples are: IN,OUT,PUSH,POP,HLT etc.
The instruction set of a microprocessor is the collection of the instructions that the microprocessor is designed to execute.The instructions that are said in this set are based on the Intel 8085 processor.The programmer can write a assembly language program using the instruction set of a microprocessor.These instructions are classified into the following groups:
1) Data Transfer Instructions.
2) Arithmetic Instructions.
3)Logical Instructions
4)Branch Control Instructions
5)I/O and Machine Control Instructions.
Data Transfer Instructions:
->Instructions which ate used to transfer data from one register to another register from memory to register or register to memory will come under this group.The different data transfer instructions are MVI,LXI,LDA,STA etc. For more detail Click here.
Arithmetic Instructions:
->The instructions of this group perform operations like addition,subraction,increment or decrement of the content of the register or the memory location.Examples :ADD,SUB,INR,DAD.
Logical Instructions:
->The instructions of these group perform logical operations like AND,OR,compare,rotate etc.
Examples are ANA,XRA,ORA,CMP,RAL etc.
Branch Control Instructions:
->This group includes the instructions for conditional and unconditional jump,subroutine call,return and restart.Examples are: JMP,JC,JZ,CALL,CZ,RST etc.
I/O and Machine Control Instructions:
->This group includes the instructions for input/output ports,stack and machine control.
Examples are: IN,OUT,PUSH,POP,HLT etc.
Intel Xeon Processor X5560
->It is a 5500 series processor
-> Clock Speed of 2.80GHz
->6.4 GT/s of QPI Speed
->8MB of Cache
->No of cores are 4
->No of QPI links are 2
-> It is based on 45nm lithography
-> Maximum TDP is 95W
-> Halogens free options available
->Instruction set of 64bit.
->No of transistors are 731 million
->Price is $1172.00
-> Sockets supported is FCLGA1366
-> The compatible chipset is Intel 5500 Chipset and Intel 5520 Chipset
-> Clock Speed of 2.80GHz
->6.4 GT/s of QPI Speed
->8MB of Cache
->No of cores are 4
->No of QPI links are 2
-> It is based on 45nm lithography
-> Maximum TDP is 95W
-> Halogens free options available
->Instruction set of 64bit.
->No of transistors are 731 million
->Price is $1172.00
-> Sockets supported is FCLGA1366
-> The compatible chipset is Intel 5500 Chipset and Intel 5520 Chipset
Intel Xeon Processor X5570
->It is a 5500 series processor
-> Clock Speed of 2.93GHz
->6.4 GT/s of QPI Speed
->8MB of Cache
->No of QPI links are 2
-> It is based on 45nm lithography
-> Maximum TDP is 95W
-> Sockets supported is FCLGA1366
-> Halogens free options available
->Price is $1386.00
->No of transistors are 731 million
-> The compatible chipset is Intel 5500 Chipset and Intel 5520 Chipset
-> Clock Speed of 2.93GHz
->6.4 GT/s of QPI Speed
->8MB of Cache
->No of QPI links are 2
-> It is based on 45nm lithography
-> Maximum TDP is 95W
-> Sockets supported is FCLGA1366
-> Halogens free options available
->Price is $1386.00
->No of transistors are 731 million
-> The compatible chipset is Intel 5500 Chipset and Intel 5520 Chipset
Intel Xeon Processor X7350
-> Clock Speed of 2.93GHz
->1066MHz of FSB speed
->8MB of Cache
->No of cores are 4
-> It is based on 65nm technology
-> Maximum TDP is 130W
-> Sockets supported is PGA604,PPGA604
-> Halogens free options not available
->Instruction set is of 64 bit size.
-> The compatible chipset is Intel 7300
->The price varies from $2,417.87-$2,726.99.This can be obtained in sites like amazon,cdw and neqx.
->1066MHz of FSB speed
->8MB of Cache
->No of cores are 4
-> It is based on 65nm technology
-> Maximum TDP is 130W
-> Sockets supported is PGA604,PPGA604
-> Halogens free options not available
->Instruction set is of 64 bit size.
-> The compatible chipset is Intel 7300
->The price varies from $2,417.87-$2,726.99.This can be obtained in sites like amazon,cdw and neqx.
Friday, September 25, 2009
Intel Xeon Processor X7460
Intel Xeon Processor X7460
->It is a Xeon 7400 Series processor
-> Clock Speed of 2.66GHz
->16MB of Cache
->No of cores are 6
->1066MHz of FSB Speed
-> It is based on 45nm lithography
-> Maximum TDP is 130W
-> Halogens free options unavailable
->Instruction set of 64bit.
->No of transistors are 1900 million
->Price is $2729.00
-> Sockets supported is PGA604
-> The compatible Chipset is Intel 7300 Chipset
->It is a Xeon 7400 Series processor
-> Clock Speed of 2.66GHz
->16MB of Cache
->No of cores are 6
->1066MHz of FSB Speed
-> It is based on 45nm lithography
-> Maximum TDP is 130W
-> Halogens free options unavailable
->Instruction set of 64bit.
->No of transistors are 1900 million
->Price is $2729.00
-> Sockets supported is PGA604
-> The compatible Chipset is Intel 7300 Chipset
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